This invention relates to a system and method for manipulating dislocations in semiconductor devices using a scanned laser.
Currently, 65 nanometer (nm) technology and beyond makes extensive use of strain engineering to optimize device performance. The appearance and uncontrolled behavior of dislocations in this context is a frequent source of problems, since these defects provide electrical leakage paths and also lead to undesired local strain variations. At the same time, the deliberate relaxation of strained layers by dislocation motion is a common technique of preparing substrates on which strained layers can be grown.
An economic determinant of integrated circuit process technology is the yield, that is, the percentage of the total number of chips processed that are good. The yield of complex integrated circuits is typically a few percent. One major factor that affects this yield is the presence of crystal defects in silicon, or in other semiconductor wafers on which integrated circuits are built. Some of these crystal defects can be classified as dislocations, which can be introduced in high temperature processing when large strains are present.